C2019-33 – Asynchronous Polymorphic Logic Gate Design

Technology # 19-33 The asynchronous polymorphic logic gate design described in this IP disclosure form will allow the same digital circuit to exhibit two distinctive functionalities controlled by the supply voltage. Compared to implementing the two functionalities separately, the polymorphic design is much more efficient and provides unique advantages such as adaptivity and enhanced security. Technology Ventures ventures@uark.edu 479-575-7243

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